4.6 Article

0.5-1-V, 90-400-mA, Modular, Distributed, 3 x 3 Digital LDOs Based on Event-Driven Control and Domino Sampling and Regulation

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 56, Issue 9, Pages 2781-2794

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2021.3069954

Keywords

Distributed event-driven (ED) controls; domino sampling and regulation; multiple digital low-dropout voltage regulator (LDO) system; power grid resistance; system-on-chip (SoC)

Funding

  1. National Science Foundation [CCF-1453142]
  2. Samsung Electronics

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This study addresses the accuracy and dynamic load regulation performance degradation of LDOs in the presence of parasitics in the power grid of a large digital load by deploying multiple event-driven digital low-dropout voltage regulators (LDOs). The IR drop is improved by deploying multiple LDOs across the power grid, while the dynamic voltage droop problem is tackled by using LDOs with ED control and a novel domino sampling and regulation technique. The stability and performance of the system across different R-G values are analyzed, showing significant improvements in voltage droop and current density compared to a single LDO system.
This article presents on-chip power delivery hardware comprised of nine event-driven (ED) digital low-dropout voltage regulators (LDOs) for a large digital load. The goal is to address the performance degradations in an LDO's accuracy and dynamic load regulation in the presence of parasitics in the power grid of a load. In particular, we investigate the effects of power grid resistance (R-G), which becomes worse with the size of a digital load and technology scaling. Two critical problems that we address are: 1) the IR drop and 2) the dynamic voltage droop problems. Employing multiple LDOs across the power grid improves the IR drop for mainly better voltage sensing. To tackle the voltage droop problem, we distribute LDOs with ED control such that the LDO closest to a localized droop can instantly correct it. To further improve the feedback control latency, we also enhance each LDO with a novel domino sampling and regulation technique. We prototype the on-chip power delivery system consisting of 3 x 3 digital LDOs in a 65-nm CMOS. We also devise the framework to analyze the stability of the multi-LDO system across R-G values. Measurements show that at 0.5-V (1 V) input, the single LDO exhibits 49.8-mV (94.1 mV) voltage droop for a load current change of 4.04 mA/0.1 ns (13.8 mA/0.2 ns) with a 0.1-nF integrated output capacitor. Also, the nine-LDO system achieves a current density of 248.8 mA/mm(2) (1.118.6 A/mm(2)) at 0.5-V (1 V) input voltage.

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