Journal
IEEE ELECTRON DEVICE LETTERS
Volume 42, Issue 9, Pages 1295-1298Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2021.3096248
Keywords
FeFETs; Logic gates; Threshold voltage; Annealing; Tin; Voltage measurement; Transistors; Ferroelectric FET (FeFET); HZO; endurance characteristics of FeFET; high-pressure annealing
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Funding
- INHA University Research Grant
- Brain Korea 21 Plus Project in 2021
- Ministry of Trade, Industry and Energy (MOTIE)
- Korea Semiconductor Research Consortium (KSRC) [10067739, 20010847]
- National Research Foundation (NRF) - Korean Ministry of Science and ICT [2020M3F3A2A01081670, 2020M3F3A2A01081666]
- Korea Evaluation Institute of Industrial Technology (KEIT) [10067739, 20010847] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
- National Research Foundation of Korea [2020M3F3A2A01081670] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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The HfZrO2 (HZO) ferroelectric field-effect transistor (FeFET) fabricated on a silicon-on-insulator substrate showed improved performance and durability after high-pressure forming gas annealing, leading to superior endurance exceeding 10(10) cycles and robust retention behavior. Appropriate thermal treatment for the interlayer and ferroelectric material significantly enhanced FeFET performance and reliability.
Wakeup-free and endurance-robust HfZrO2 (HZO) ferroelectric field-effect transistor (FeFET) was fabricated on a silicon-on-insulator substrate. After a high-pressure forming gas annealing as the last alloy step, the performance and endurance of the FeFETs were significantly improved by trap states reduction, polarization enhancement, and wake-up elimination. As the result, the FeFETs show superior endurance exceeding 10(10) cycles and robust retention behavior at program/erase biases of +/- 3.5V and pulse width of 100 ns. These results indicate that appropriate thermal treatment for the interlayer and ferroelectric material could substantially improve FeFET performance and reliability.
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