4.7 Article

All-parylene flexible wafer-scale graphene thin film transistor

Journal

APPLIED SURFACE SCIENCE
Volume 551, Issue -, Pages -

Publisher

ELSEVIER
DOI: 10.1016/j.apsusc.2021.149410

Keywords

Graphene; Flexible electronics; Thin film transistor; TFT; Flexible gate dielectric; Two-dimensional materials; Parylene C

Funding

  1. European Union [696656, 785219]
  2. Academy of Finland [1502002, 13298297]

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By using the same polymer layer for both the transfer of graphene and the flexible substrate, this study successfully produced graphene thin film transistors on a wafer scale with low gate bias and high mechanical resilience.
Graphene is an ideal candidate as a component of flexible/wearable electronics due to its two-dimensional nature and low gate bias requirements for high quality devices. However, the proven methods for fabrication of graphene thin film transistors (TFTs) on fixed substrates involve using a sacrificial polymer layer to transfer graphene to a desired surface have led to mixed results for flexible devices. Here, by using the same polymer layer (parylene C) for both graphene transfer and the flexible substrate itself, we produced graphene TFTs on the wafer-scale requiring less than vertical bar 2 V vertical bar gate bias and with high mechanical resilience of 30,000 bending cycles.

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