4.8 Article

Multi-State Heterojunction Transistors Based on Field-Effect Tunneling-Transport Transitions

Journal

ADVANCED MATERIALS
Volume 33, Issue 29, Pages -

Publisher

WILEY-V C H VERLAG GMBH
DOI: 10.1002/adma.202101243

Keywords

field‐ effect transistors; indium– gallium– zinc oxide; multivalued logic; PTCDI; tunneling; vertical heterostructure

Funding

  1. National Research Foundation of Korea (NRF) - Korean Government (MSIT) [2020R1A4A2002806, 2020R1C1C1009381]
  2. Creative Materials Discovery Program through the NRF of Korea - Ministry of Science and ICT, Korea [2019M3D1A1078299]
  3. Yonsei University
  4. National Research Foundation of Korea [2019M3D1A1078299, 2020R1C1C1009381] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is proposed. The electrical properties of the device are found to be influenced by both conventional field-effect charge transport and field-effect charge tunneling at heterointerfaces. Various ternary logic circuits can be operated using the optimized multistate heterojunction transistors.
A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is presented. Incorporation of the organic heterostructure into the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) architecture induces the generation of stable multiple logic states in the device; these states can be further optimized to be equiprobable and distinctive, which are the most desirable and requisite properties for multivalued logic devices. A systematic investigation reveals that the electrical properties of the device are governed by not only the conventional field-effect charge transport but also the field-effect charge tunneling at the heterointerfaces, and thus, an intermediate state can be finely tuned by independently controlling the transition between the onsets of these two mechanisms. The achieved device performance agrees with the results of a numerical simulation based on a pseudo-metal-insulator-metal model; the obtained findings therefore provide rational criteria for material selection in a simple energetic perspective. The operation of various ternary logic circuits based on the optimized multistate heterojunction transistors, including the NMIN and NMAX gates, is also demonstrated.

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