4.8 Article

Polarity Control and Weak Fermi-Level Pinning in PdSe2 Transistors

Journal

ACS APPLIED MATERIALS & INTERFACES
Volume 13, Issue 36, Pages 43480-43488

Publisher

AMER CHEMICAL SOC
DOI: 10.1021/acsami.1c08028

Keywords

two-dimensional materials; palladium diselenide; metal contact; Schottky barrier; CMOS inverter

Funding

  1. Basic Science Research Program through the National Research Foundation of Korea (NRF) - Ministry of Science, ICT and Future Planning [2017R1C1B5015940, 2018R1D1A1B0741867]

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Two-dimensional materials are considered key materials for future logic devices due to their excellent electrostatic integrity, but carrier polarity control in 2D material field-effect transistors remains a challenging issue. The carrier polarity in PdSe2 FETs can be modulated simply by changing the metal contact, allowing for the realization of complementary logic functions in PdSe2-based CMOS circuits. Ultimately, this study suggests the potential for PdSe2-based CMOS logic circuits with different metal contacts for n- and p-MOSFETs.
Two-dimensional (2D) materials have been considered key materials for the future logic devices due to the excellent electrostatic integrity originating from their ultrathin nature. However, the carrier polarity control of 2D material field-effect transistors (FETs) still remains a challenging issue, hindering the realization of complementary logic function in the 2D material platform. Here, we report a comprehensive study on the electrical characteristics of PdSe2 FETs with different metal contacts. It is found that the carrier polarity in PdSe2 FETs can be modulated simply by changing the metal contact due to the weak Fermi-level pinning in PdSe2. We demonstrate a complementary metal-oxidesemiconductor (CMOS) inverter using the same channel material PdSe2, for n- and p-MOSFETs but with different metal contacts, suggesting the possible realization of PdSe2-based CMOS logic circuits.

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