Journal
ADVANCED MATERIALS TECHNOLOGIES
Volume 6, Issue 7, Pages -Publisher
WILEY
DOI: 10.1002/admt.202100141
Keywords
charge trapping; nonvolatile memory transistor; polymeric electret; printed electronics; reverse offset printing
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Funding
- Korea Innovation Foundation (INNOPOLIS) grant [2020-DD-UP-0278]
- Energy Technology Development Program of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) from the Ministry of Trade, Industry & Energy (MOTIE) of the Republic of Korea [20193020010370]
- Korea Evaluation Institute of Industrial Technology (KEIT) [20193020010370] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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This study presents printed organic nonvolatile memory thin-film transistors with a phase-separated tunneling layer. The devices exhibit significantly improved performance, including V-TH shifts, programmed/erased current ratio, switching speed, and data retention. This memory device has potential applications in wearable electronics, smart Internet-of-Things devices, and neuromorphic computing devices.
In this study, printed organic nonvolatile memory thin-film transistors (TFTs) with phase-separated tunneling layer is presented. Finely patterned electrodes are fabricated by reverse-offset printing with 15 mu m line width and 10 mu m channel length. Memory devices are configured in a bottom-gate bottom-contact TFT structure with a high-k gate blocking insulator poly(vinylidene fluoride-co-trifluoroethylene). A blended ink, which consisted of a small-molecule p-type organic semiconductor dithieno[2,3-d;2 ',3 '-d ']benzo[1,2-b;4,5-b ']dithiophene and a polystyrene dielectric, is fabricated using air-pulse nozzle printing. The tunneling layer is formed during the active layer printing process with the blended ink by phase separation of small-molecule and polymer. The printed memory TFTs with the phase-separated tunneling layer exhibit significantly improved V-TH shifts (approximate to 3 times), programmed/erased current ratio (>10(3) A A(-1)), switching speed (<100 ms), and estimated data retention (>10 years). This memory device can be applied to wearable electronics, smart Internet-of-Things devices, and neuromorphic computing devices.
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