Journal
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Volume 30, Issue 14, Pages -Publisher
WORLD SCIENTIFIC PUBL CO PTE LTD
DOI: 10.1142/S0218126621502613
Keywords
Memristor; Chua; summation generator; random bit generation; statistical test introduction
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The study proposed a hybrid true random bit generator using Chua and memristor structures, converting continuous Chua and memristor outputs into bit sequences through modular arithmetic, and generating desired bit sequences using a summation generator. The NIST Test Suite and Scale Index tests were used to test randomness, while correlation, complexity, and key sensitivity analyses were conducted for the generated numbers' security.
Chaos-based random bit generators (RBGs) are used in encryption and in chaotic communication systems applications, such as synchronization and secure communication. Chaotic maps and circuits that display chaotic behavior as entropy sources are used to implement the random number generators (RNGs). In this study, a hybrid true random bit generator is proposed using Chua and memristor structures that display chaotic behavior as entropy sources. Continuous Chua and memristor outputs were sampled from the proposed hybrid structure. The samples obtained were converted into bit sequences by using modular arithmetic. Finally, both bit sequences were given as input to a summation generator. The output of the summation generator produces the desired bit sequences. The NIST Test Suite and the Scale Index tests were used on the resulting bit sequences to indicate their randomness. Also, correlation, complexity and key sensitivity analyses were performed for analyzing the security of the generated numbers.
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