4.5 Article

High-Performance Spintronic Nonvolatile Ternary Flip-Flop and Universal Shift Register

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TVLSI.2021.3055983

Keywords

Magnetic tunneling; Transistors; CNTFETs; Threshold voltage; Logic gates; Spintronics; Nonvolatile memory; Flip-flop (FF); gate-all-around carbon nanotube field-effect transistor (GAA-CNTFET); multiple-valued logic (MVL); register; spintronic

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The article introduces new ternary retention flip-flops and shift registers utilizing spin logic, carbon nanotube field-effect transistors, and magnetic tunnel junctions, aimed at reducing power consumption and eliminating the risk of data loss. Simulation results show significant reductions in power consumption, backup time, and restore energy, offering at least 22%, 40%, and 15% improvements, respectively.
Multiple-valued logic (MVL) shows considerable advantages over binary logic in certain applications because of the increased informational content of its signals, and hence reduction in interconnects. Flip-flops (FFs) are the basic elements of many systems and are widely used in microprocessors due to their high performance. This article presents two spintronic ternary retention FFs, and a nonvolatile universal ternary shift register (NUTSR) based on gate-all-around carbon nanotube field-effect transistors (GAA-CNTFETs) and nonvolatile magnetic tunnel junction (MTJ). In the proposed input-aware ternary retention FF circuit, power consumption is significantly reduced by adding a magnitude comparator (MC) circuit and preventing duplicate data transfer to MTJs. Simulation results indicate that our design offers at least 22%, 40%, and 15% reductions in power consumption, backup time, and restore energy, respectively. Moreover, it eliminates the risk of data loss in the event of a sudden power outage.

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