In-situ characterization up to 100 GHz of insulators used in new 3D System in Package on board (SiPoB) technologies

Insulating materials used for the packaging of integrated circuits play an important role in the electrical performance of the new System-in-Package (SiP), designed to support flows greater than 10 Gbits/s. These insulating materials must have a low relative permittivity and low dielectric losses up to several tens of GHz in order to insure the integrity of the propagated signals. In this paper the in-situ characterization of molding resins and core materials, used respectively for the encapsulation and the package substrate of chips of new 3D SiP on Board (SiPoB 3D), is carried out up to 100 GHz. These characterizations are performed after the manufacturing process (deposition, drying) of insulators and in their final conditions of use (thicknesses of a few microns, thinning, polishing) since their permittivity is highly dependent on the entire process. The characterization methodology is based on two original techniques: the analysis of the signal propagation on specially optimized CPW lines (coplanar lines) and the analysis of the reflection coefficient measured at the end of a CPW RF probe directly set down the surface of the insulator sample. This new technique makes it possible to overcome whole metallization steps required to achieve waveguide structures used in most material characterization techniques. In addition, the complex permittivity can be 2D-scanned on the entire surface area of the sample of material under test with our technique.

Automated summary

This paper presents in-situ characterization of insulating materials used in packaging and substrate of chips, highlighting their importance in maintaining signal integrity at high frequencies. Novel analysis techniques are employed to avoid metallization steps and allow for 2D scanning of complex permittivity across the sample surface.