Sequence-Impedance Modeling of Voltage Source Converter Interconnection Under Asymmetrical Grid Fault Conditions

Nonlinear behaviors of voltage source converter (VSC) and the interconnection under grid fault conditions are discussed in the article. Based on the discussion, a sequence-impedance model is developed from the complex space vector analysis. Lumped sequence admittances of the converter interconnection and perturbation propagation considering the coupling between ac and dc circuits are presented in this article. The influence of the phase-locked loop design for improving low-voltage ride-through performance on the sequence-admittance model is also introduced. The sequence admittances are calculated, compared, and verified with point-by-point simulations and experiment. Obtained results indicate that the sequence-admittance model is effective for describing and predicting the behavior of VSC interconnection under asymmetrical grid fault conditions.

Automated summary

This article discusses the nonlinear behaviors of voltage source converters (VSC) and their interconnection under grid fault conditions, proposing a sequence impedance model developed from complex space vector analysis. The influence of phase-locked loop design on the sequence admittance model is also introduced. Results indicate that the sequence admittance model effectively describes and predicts the behavior of VSC interconnection under asymmetrical grid fault conditions.