ALD-ZrO2 gate dielectric with suppressed interfacial oxidation for high performance MoS2 top gate MOSFETs

To enhance the feasibility of 2-dimensional transition metal dichalcogenides (TMDCs) channels in future nano-electronic and optoelectronic devices, a top gate device structure fabricated with very-large-scale-integration compatible process is mandatory. High-kappa dielectric ZrO2 has been directly deposited on MoS2 through low-temperature atomic layer deposition (ALD) without any surface protection layers. The uniform growth of ZrO2 on MoS2 was confirmed to be caused by the physical adsorption, resulting in the suppressed interfacial oxidation and the reduced damage of monolayer (1L) MoS2 channel. Low thermal budget post-deposition annealing was found to be effective for reducing interfacial traps between ZrO2 and MoS2 interface, thus enhancing the device performances of 1L MoS2 nMOSFETs. Low capacitance equivalent thickness (CET) of ZrO2 of 2.3 nm has been achieved while maintaining decent device performance, indicating low-temperature ALD is promising for future TMDC top gate devices with a high-quality interface and thin CET. (c) 2021 The Japan Society of Applied Physics

Automated summary

The study demonstrates that depositing ZrO2 directly on MoS2 through low-temperature ALD can suppress oxidation, reduce damage to the MoS2 channel, lower interfacial traps, and improve device performance of 1L MoS2 nMOSFETs. Low thermal budget post-deposition annealing is effective for achieving a low CET of 2.3 nm, promising for future TMDC top gate devices with high-quality interfaces.