4.8 Article

PCB-Embedded GaN-on-Si Half-Bridge and Driver ICs With On-Package Gate and DC-Link Capacitors

Journal

IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 36, Issue 1, Pages 83-86

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2020.3005621

Keywords

Integrated circuits; Capacitors; Logic gates; Inductance; Gallium nitride; Gate drivers; Transistors; Bridge circuits; driver circuits; gallium nitride; multichip modules; power integrated circuits; printed circuits; semiconductor device packaging

Funding

  1. German Federal Ministry of Education and Research (BMBF) under Grant GaNIAL [FKZ: 16EMO215K]

Ask authors/readers for more resources

The study achieved a low-inductive half-bridge and gate driver package through a beneficial combination of PCB embedding and monolithic circuit integration, addressing the interconnection challenge with external capacitors.
A low-inductive half-bridge and gate driver package with on-package gate and dc-link capacitors is realized by printed circuit board (PCB) embedding of two GaN-on-Si ICs. While monolithic half-bridge and driver integration reduces on-chip parasitics, it does not solve the interconnection challenge to external capacitors. This letter solves this issue through advantageous combination of PCB embedding and monolithic circuit integration. This letter uses GaN-on-Si power circuits with integrated gate drivers, freewheeling diodes, and temperature and current sensors. GaN ICs are fabricated with thick copper on both sides, which makes them applicable to commercial PCB-embedding technologies. Thermal aspects are discussed and electromagnetic simulations used to compare the PCB-embedded package to a bond wire based package. A PCB-embedded dc-dc converter is operated up to 350 V and 450 W with up to 98.7% efficiency. 380 V hard-switching transitions show below 8% over- and undershoot despite over 120 V/ns slew rates. Parallel platelike placement of silicon flip-chip capacitors above the gate driver final stage transistors and separated only by a thin PCB layer increased the gate-loop parasitic inductance by only 40 pH.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.8
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available