4.8 Article

A Composite Failure Precursor for Condition Monitoring and Remaining Useful Life Prediction of Discrete Power Devices

Journal

IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS
Volume 17, Issue 1, Pages 688-698

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TII.2020.2991454

Keywords

MOSFET; Degradation; Silicon carbide; Temperature measurement; Predictive models; Insulated gate bipolar transistors; Accelerated aging; Condition monitoring (CM); composite failure precursor (CFP); genetic programming (GP); power devices; remaining useful life (RUL); SiC MOSFETs

Funding

  1. Innovation Fund Denmark through the project of Advanced Power Electronic Technology and Tools (APETT)
  2. National Science Foundation [1454311]
  3. Semiconductor Research Corporation (SRC)/Texas Analog Center of Excellence (TxACE) [2712.026]

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By integrating potential failure precursors and optimizing them based on a degradation model, formulating a composite failure precursor can enhance the accurate prediction of remaining useful life in power electronic systems.
In order to prevent catastrophic failures in power electronic systems, multiple failure precursors have been identified to characterize the degradation of power devices. However, there are some practical challenges in determining the suitable failure precursor, which supports the high-accuracy prediction of remaining useful life (RUL). This article proposes a method to formulate a composite failure precursor (CFP) by taking full advantage of potential failure precursors (PFPs), where CFP is directly optimized in terms of the degradation model to improve the prediction performance. The RUL estimations of the degradation model are explicitly derived to facilitate the precursor quality calculation. For CFP formulation, a genetic programming method is applied to integrate the PFPs in a nonlinear way. As a result, a framework that can formulate a superior failure precursor for the given RUL prediction model is elaborated. The proposed method is validated with the power cycling testing results of SiC MOSFETs.

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