Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 35, Issue 10, Pages 11143-11154Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2020.2978724
Keywords
Switches; Inverters; Space vector pulse width modulation; Voltage control; Software; Common-mode voltage; NPC; PWM; three-level
Categories
Funding
- Fundamental Research Funds for the Central Universities [JS194325]
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In this article, a common-mode voltage reduction pulsewidth modulation (CMV-R PWM) for three-level neutral point clamped inverter based on the simplification of the three-level space-vector diagram into that of a two-level inverter is studied. By replacing the switching sequence of two-level space-vector PWM with that of CMV-R PWM, the common-mode voltage of the proposed method can be restricted to one-sixth of the dc-link voltage. With the new switching sequences, the neutral-point voltage control by calculating an optimized injected zero-sequence voltage is introduced. Simulation and comparative analysis is given to illustrate the features of the proposed method. The effectiveness and correctness of the proposed method is verified by experiment.
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