4.7 Article

Critical Clearing Time Determination and Enhancement of Grid-Forming Converters Embedding Virtual Impedance as Current Limitation Algorithm

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2019.2959085

Keywords

Current limitation; droop control; grid-forming voltage source converter (VSC); transient stability; virtual impedance (VI)

Funding

  1. European Union's Horizon 2020 Research and Innovation Program [691800]

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This article deals with the postfault synchronization of a voltage source converter based on the droop control. In the case of large disturbances on the grid, the current is limited via current limitation algorithms such as the virtual impedance. During the fault, the power converter internal frequency deviates, resulting in a converter angle divergence. Thereby, the system may lose the synchronism after fault clearing and which may lead to instability. Hence, this article proposes a theoretical approach to explain the dynamic behavior of the grid-forming converter subject to a three-phase bolted fault. A literal expression of the critical clearing time is defined. Due to the precise analysis of the phenomenon, a simple algorithm can be derived to enhance the transient stability. It is based on adaptive gain included in the droop control. These objectives have been achieved with no external information and without switching from one control to the other. To prove the effectiveness of the developed control, experimental test cases have been performed in different faulted conditions.

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