4.8 Article

High-Performance and Reliable Lead-Free Layered-Perovskite Transistors

Journal

ADVANCED MATERIALS
Volume 32, Issue 31, Pages -

Publisher

WILEY-V C H VERLAG GMBH
DOI: 10.1002/adma.202002717

Keywords

complementary inverters; grain size engineering; lead-free perovskite transistors; self-passivation; solution processing

Funding

  1. Ministry of Science & ICT through the NRF - Korean government [2017R1E1A1A01075360, NRF-2018R1A2B2002875]
  2. Centre for Advanced Soft-Electronics [2013M3A6A5073183]

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Perovskites have been intensively investigated for their use in solar cells and light-emitting diodes. However, research on their applications in thin-film transistors (TFTs) has drawn less attention despite their high intrinsic charge carrier mobility. In this study, the universal approaches for high-performance and reliable p-channel lead-free phenethylammonium tin iodide TFTs are reported. These include self-passivation for grain boundary by excess phenethylammonium iodide, grain crystallization control by adduct, and iodide vacancy passivation through oxygen treatment. It is found that the grain boundary passivation can increase TFT reproducibility and reliability, and the grain size enlargement can hike the TFT performance, thus, enabling the first perovskite-based complementary inverter demonstration with n-channel indium gallium zinc oxide TFTs. The inverter exhibits a high gain over 30 with an excellent noise margin. This work aims to provide widely applicable and repeatable methods to make the gate more open for intensive efforts toward high-performance printed perovskite TFTs.

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