Journal
IET CIRCUITS DEVICES & SYSTEMS
Volume 14, Issue 6, Pages 762-769Publisher
INST ENGINEERING TECHNOLOGY-IET
DOI: 10.1049/iet-cds.2019.0517
Keywords
circuit simulation; frequency response; CMOS integrated circuits; transfer functions; capacitors; differential amplifiers; matrix algebra; differential block; simple frequency compensation technique; differential feedback stage; single Miller capacitor; frequency compensation network; matrix description; analytical transfer function; compensation capacitor; gain bandwidth; phase margin values; TSMC CMOS technology; frequency response; four-stage CMOS amplifier; low die occupation; HSPICE circuit simulator; size 0; 18 mum
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Simple and efficient frequency compensation technique for a four-stage amplifier is presented in this study. Using a differential feedback stage and a single Miller capacitor on its output, the frequency compensation network is formed. The proposed configuration is described via matrix description. Meanwhile, an analytical transfer function is calculated. The proposed amplifier demonstrates low die occupation because of the small value of the compensation capacitor while shows acceptable frequency response regarding gain bandwidth and phase margin values. In addition, the design procedure is simple compared to the previous state-of-the-art. The HSPICE circuit simulator and TSMC 0.18 mu m CMOS technology were exploited to verify theoretical presentation.
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