Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 35, Issue 5, Pages 4669-4677Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2019.2944073
Keywords
Electrostatic discharges; Logic gates; Cathodes; Electric fields; Anodes; Junctions; Stress; Electrostatic devices; electrostatic discharges (ESDs); industrial electronics
Categories
Funding
- National Natural Science Foundation of China [61827812, 61774129, 91648119]
- Hunan Science and Technology Department Huxiang High-level Talent Gathering Project [2019RS1037]
- Changsha Science and Technology Plan Key Projects [kq1801035]
- Project of ShanghaiMunicipal Science and Technology Commission [17DZ1205000]
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In an industrial-grade bus, transient voltage suppressor (TVS) devices that need to withstand inrush currents ensure electrostatic discharge (ESD) reliability of the core chip. This article designs four types of dual-direction silicon-controlled rectifier (DDSCR) device structures based on the 0.5-& x03BC;m CMOS process. The ESD performance of the TVS device is predicted and verified based on the basic principles of the device, two-dimensional device simulation, and transmission line pulse test results. Four DDSCR structures are embedded with floating N & x002B; to adjust the device & x0027;s holding voltage window. The results show that the current release capacity of DDSCR_1 is 81.93 mA & x002F;& x03BC;m. The current release capability of DDSCR_2, which has a double-dummy-gate structure, is 82.37 mA & x002F;& x03BC;m. The current release capability of DDSCR_3 of the gate-controlled structure is 86.68 mA & x002F;& x03BC;m. The current release capability of DDSCR_4 of the double-dummy-gate structure and the gate-controlled structure is 86.25 mA & x002F;& x03BC;m. Furthermore, the effect of the size of these devices on the ESD characteristics was studied. The on-resistance of the device structure is calculated by the curve-fitting method. The influence of the dummy gate structure and the gate-controlled structure on the ESD characteristics is analyzed. Finally, the optimal device size to meet the window is found.
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