4.7 Article

Design and Experimental Validation of a Wire-Bond-Less 10-kV SiC MOSFET Power Module

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2019.2944138

Keywords

Silicon carbide; Multichip modules; MOSFET; Silicon; Electric fields; Switches; Ceramics; Electromagnetic interference (EMI); high-voltage techniques; packaging; silicon carbide (SiC)

Funding

  1. U.K. Engineering and Physical Sciences Research Council (EPSRC) [EP/K035304/1]
  2. CPES High Density Integration Consortium
  3. EPSRC [EP/K035304/1] Funding Source: UKRI

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Wide bandgap (WBG) power devices with voltage ratings exceeding 10 kV have the potential to revolutionize medium- and high-voltage systems due to their high-speed switching and lower ON-state losses. However, the present power module packages are limiting the performance of these unique switches. The objective of this article is to push the boundaries of high-density, high-speed, 10-kV power module packaging. The proposed package addresses the well-known electromagnetic and thermal challenges, as well as the more recent and prominent electrostatic and electromagnetic interference (EMI) issues associated with high-speed, 10-kV devices. The module achieves low and balanced parasitic inductances, resulting in a record switching speed of 250 V/ns with negligible ringing and voltage overshoot. An integrated screen reduces the common-mode (CM) current that is generated by these fast voltage transients by ten times. This screen connection simultaneously increases the partial discharge inception voltage (PDIV) by more than 50%. A compact, medium-voltage termination and system interface design is also proposed in this article. With the integrated jet-impingement cooler, the power module prototype achieves a power density of 4 W/mm(3). This article presents the design, prototyping, and testing of this optimized package for 10-kV SiC MOSFETs.

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