4.3 Article

Modified K-type multilevel inverter topology with reduced switches, DC sources, and power loss

Publisher

WILEY-HINDAWI
DOI: 10.1002/2050-7038.12345

Keywords

asymmetric; DC; AC inverter; multilevel inverter; reduced switches; symmetric

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In this paper, a new multilevel inverter topology is proposed for both symmetric and asymmetric configurations. The basic unit of the proposed topology consists of eight switches and three dc sources. In addition to this, the cascaded connection of the proposed topology is presented with various combinations of dc source values. The proposed topology is compared with other recent multilevel inverter topologies in terms of a number of power components and cost. To validate the performance of the proposed topology, the MATLAB/Simulink software is used, and results are discussed. Further, the prototype hardware is developed, and experimental waveforms are captured. The results of both simulation and experimental are presented, and it has a good agreement in terms of total harmonic distortion and dynamic performance for various loads.

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