4.6 Article

Design of E- and W-Band Low-Noise Amplifiers in 22-nm CMOS FD-SOI

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2019.2944820

Keywords

Metals; Transistors; Noise measurement; Inductors; Gain; Power demand; Capacitors; E; and W-bands; low-noise amplifier (LNA); millimeter-wave integrated circuits; 22-nm CMOS FD-SOI

Funding

  1. Defense Advanced Research Projects Administration (DARPA)
  2. Analog Devices, Inc., Boston, MA, USA

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This article presents E- and W-band low-noise amplifiers (LNA) in GlobalFoundries 22-nm CMOS fully depleted silicon-on-insulator (FD-SOI). Both amplifiers employ a three-stage cascode design with gain-boosting transformer loads. Design procedures are presented for E- and W-band LNAs for narrowband and wideband applications. The E-band LNA focuses on a high-gain, low-power implementation, and results in a gain and noise figure (NF) of 20 and 4.6 dB at 77 GHz with a 3-dB bandwidth of 12 GHz, and an input P1dB of -27.4 dBm, for a power consumption of 9 mW. The W-band LNA focuses on wideband applications and results in a peak gain of 18.2 dB with a 3-dB bandwidth of 31 GHz, for a power consumption of 16 mW. The LNAs have a high figure-of-merit (FoM) and show very low-power operation in the 70-100 GHz range. Application areas are in phased arrays for 5G with hundreds or thousands of elements, automotive radars at 77 GHz, and sensors at 94 GHz.

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