Journal
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume 66, Issue 12, Pages 9260-9267Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2019.2893834
Keywords
Grid synchronization; harmonics; interharmonics; phase-locked loop (PLL); power electronic converters
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Funding
- Conselho Nacional de Desenvolvimento Cientifico e Tecologico
- Coordenacao de Aperfeicoamento de Pessoal de Nivel Superior
- Fundacao de Amparo a Pesquisa do Estado de Minas Gerais
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This paper presents a phase-locked loop algorithm adequate for applications regarding single-phase power grids. The proposed approach is based on the correlation of the input signal with a complex one obtained from an adaptive filter aiming at minimizing computational burden and increasing accuracy when compared with a former algorithm previously proposed in the literature. Thus, it is possible to obtain high disturbance rejection, especially when dealing with the presence of subharmonics and interharmonics in the frequency spectrum of the supply voltage. Performance is thoroughly evaluated through experimental tests considering both steady-state and dynamic behaviors, while a proper comparison is established with other similar solutions.
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