A 1 V, 0.53 ns, 59 μW Current Comparator Using Standard 0.18 μm CMOS Technology

This letter aim to propose a current comparator based on simple current mirror which use single amplifier to reduce input offset, the improving symmetry current comparator achieve lower propagation delay (0.53 ns at input current I=10 mu and lower power dissipation (59 mu by comparing proposed structure at the supply voltage of 1 V, circuit simulations are performed in cadence software and hspice for a 0.18 mu m TSMC standard CMOS process.