Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 66, Issue 10, Pages 1653-1657Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2019.2920693
Keywords
CMOS voltage reference; subthreshold; low voltage; low power; line sensitivity
Categories
Funding
- NSFC [61604067]
- SZSTI [JCYJ20170817112233337, KQJSCX20180319114406851]
- Macao Science and Technology Development Fund (FDCT) [093/2016/A]
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This brief presents a CMOS voltage reference for Internet-of-Things applications, which requires ultra-low power and high insensitivity to voltage variation from ambient energy harvesting. This brief proposed a novel self-regulating circuit to significantly diminish the line sensitivity (LS) of reference voltage to supply voltage without using any amplifiers or passive components. All the transistors in this design work in subthreshold region for low voltage and low power operation. The proposed design is fabricated in a standard 0.18-mu m CMOS process. The measurement results show that, the proposed circuit could provide an average reference voltage of 151 mV with a variation coefficient of 0.84 %. It achieves a LS of 0.0154 %/V when the supply voltage varies from 0.5 V to 1.8 V. The measured power supply ripple rejections at 10 Hz, 1 kHz, 100 kHz, and 1 MHz are -73.0 dB, -49.4 dB, -49.6 dB, and -49.8 dB, respectively. The average temperature coefficient is measured as 89.83 ppm/degrees C with a standard deviation of 12.19 ppm/degrees C in a temperature range from -40 degrees C to +125 degrees C. The consumed power of this design is 1 nW with a minimum supply voltage of 0.4 V at room temperature, and the active area is 0.005 mm(2).
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