Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops

This paper presents a novel time-variant model of multiplying delay-locked loops. A simple feed-forward model of the multiplexed ring oscillator mathematically describes the edge realignment process and, by providing an explicit tuning input, allows to be embedded into the time-variant multiplying delay-locked loop model without requiring approximations. Verification of the multiplexed ring oscillator model against detailed circuit simulations is presented. Closed-form expressions for the multiplying delay-locked loop phase noise, as a function of the system parameters and noise sources, are provided.