Journal
ACS NANO
Volume 13, Issue 10, Pages 11263-11272Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsnano.9b04337
Keywords
carbon nanotubes; hexagonal boron nitride; thin-film transistors; silver nanowires; low-temperature printing; aerosol jet printing; flexible electronics
Categories
Funding
- U.S. Army through the congressionally directed medical research program [W81XWH-17-2-0045]
- National Institute of Health (NIH) [1R01HL146849]
- Grand Challenge EPSRC Grant [EP/N010345/1]
- RFID SHP2 project [785219]
- European Union's Horizon 2020 research and innovation programme under the ICT project WASP [825213]
- Hewlett-Packard Company of the Graphene NowNano Doctoral Training Center
- National Science Foundation as part of the National Nanotechnology Coordinated Infrastructure (NNCI) [ECCS-1542015]
- EPSRC [EP/N010345/1] Funding Source: UKRI
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Semiconducting carbon nanotubes (CNTs) printed into thin films offer high electrical performance, significant mechanical stability, and compatibility with low-temperature processing. Yet, the implementation of low-temperature printed devices, such as CNT thin-film transistors (CNT-TFTs), has been hindered by relatively high process temperature requirements imposed by other device layers-dielectrics and contacts. In this work, we overcome temperature constraints and demonstrate 1D-2D thin-film transistors (1D-2D TFTs) in a low-temperature (maximum exposure <= 80 degrees C) full print-in-place process (i.e., no substrate removal from printer throughout the entire process) using an aerosol jet printer. Semiconducting 1D CNT channels are used with a 2D hexagonal boron nitride (h-BN) gate dielectric and traces of silver nanowires as the conductive electrodes, all deposited using the same printer. The aerosol jet-printed 2D h-BN films were realized via proper ink formulation, such as utilizing the binder hydroxypropyl methylcellulose, which suppresses redispersion between adjacent printed layers. In addition to an ON/OFF current ratio up to 3.5 x 10(5), channel mobility up to 10.7 cm(2).V-1.s(-1), and low gate hysteresis, 1D-2D TFTs exhibit extraordinary mechanical stability under bending due to the nanoscale network structure of each layer, with minimal changes in performance after 1000 bending test cycles at 2.1% strain. It is also confirmed that none of the device layers require high-temperature treatment to realize optimal performance. These findings provide an attractive approach toward a cost-effective, direct-write realization of electronics.
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