Journal
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS
Volume 7, Issue 3, Pages 1496-1504Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2019.2921970
Keywords
Junction barrier Schottky (JBS) diode; merged PiN Schottky (MPS) diode; reliability; silicon carbide (SiC); surge current
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Funding
- National Key Research and Development Program of China [2018YFB0905704]
- National Natural Science Foundation of China [51577169, 51777187]
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This paper presents the design and experimental analysis of 1200-V 4H-silicon carbide (SiC) merged PiN Schottky (MPS) diodes. Design considerations and device performances of the MPS diodes are compared with those of the junction barrier Schottky (JBS) diodes via numerical simulation and experiments. Due to the limited P+ width/ratio in JBS diodes, p-n junction is not turned on until very high current/voltage bias is applied. This increases the device voltage drop and energy dissipation in high current stress conditions. Thanks to the wide P+ region design and the ohmic contact on the P+ regions, the p-n junction turn-on voltage in MPS diodes is substantially decreased, and the surge current capability is improved accordingly. Furthermore, the surge capability of two layouts of the MPS diodes are compared. Layout A with similar to 60% high P+ ratio can improve the surge current capability by 10% and 20% compared with layout B design (with similar to 50% P+ ratio) and pure JBS diode (with similar to 40% P+ ratio), respectively. The reliability of the MPS diodes is studied by repetitive pulse surge current tests. No obvious degradation appears after 5500 test cycles under a surge current stress 20 times the device nominal current rating.
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