Journal
IEEE ELECTRON DEVICE LETTERS
Volume 40, Issue 8, Pages 1273-1276Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2019.2924484
Keywords
Hump effect; scanning capacitance microscopy; amorphous IGZO; thin film transistor; positive bias stress; parasitic transistor
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We investigated the hump effect, which is induced by positive gate-bias stress, of an amorphous In-Ga-Zn-O thin-film transistorwith the self-aligned top-gate structure. By applying scanning capacitancemicroscopy to the transistor with the hump effect, we directly detected a partial increase of carrier density at the channel edges in the channel width direction. The width of the high-carrier-density regions was approximately 1 mu m at each side edge, which is consistent with the estimation by electrical measurements. Such high-carrier regions at the channel edges can act as parasitic transistors with a more negative threshold voltage, generating the hump in the transfer characteristics. Our results support the idea that the hump effect is derived from the parasitic transistors at the channel edges directly and show that the scanning capacitance microscopy provides complementary information to the electrical measurements and is an effective tool to evaluate the hump effect.
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