Journal
NANO CONVERGENCE
Volume 6, Issue -, Pages -Publisher
SPRINGEROPEN
DOI: 10.1186/s40580-019-0194-1
Keywords
Indium gallium zinc oxide IGZO; Post annealing; Capacitance-voltage measurement; X-ray photoelectron spectroscopy depth profiling; Electrical bias stress stability
Funding
- National Research Foundation of Korea (NRF) - Korea government (MSIT
- Ministry of Science and ICT) [2017R1C1B1005076]
- Ministry of Trade, Industry and Energy (MOTIE)
- Korea Institute for Advancement of Technology (KIAT) through the National Innovation Cluster RD program [P0006704]
- National Research Foundation of Korea [2017R1C1B1005076] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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We have explored the effect of post-annealing on the electrical properties of an indium gallium zinc oxide (IGZO) transistor with an Al2O3 bottom gate dielectric, formed by a sol-gel process. The post-annealed IGZO device demonstrated improved electrical performance in terms of threshold variation, on/off ratio, subthreshold swing, and mobility compared to the non-annealed reference device. Capacitance-voltage measurement confirmed that annealing can lead to enhanced capacitance properties due to reduced charge trapping. Depth profile analysis using X-ray photoelectron spectroscopy proved that percentage of both the oxygen vacancy (V-O) and the hydroxyl groups (M-OH) within the IGZO/Al2O3 layers, which serve as a charge trapping source, can be substantially reduced by annealing the fabricated transistor device. Furthermore, the undesired degradation of the contact interface between source/drain electrode and the channel, which mainly concerns V-O, can be largely prevented by post-annealing. Thus, the facile annealing process also improves the electrical bias stress stability. This simple post annealing approach provides a strategy for realising better performance and reliability of the solid sot-gel oxide transistor.
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