Journal
NEUROCOMPUTING
Volume 363, Issue -, Pages 114-124Publisher
ELSEVIER
DOI: 10.1016/j.neucom.2019.06.048
Keywords
Memristor-based neural network circuit; Memristor; Synaptic circuit; Neuron circuit; Synchronous weight adjustment
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Funding
- Natural Science Foundation of China [61673188, 61761130081, 61821003]
- National Key Research and Development Program of China [2016YFB0800402]
- Foundation for Innovative Research Groups of Hubei Province of China [2017CFA005]
- Fundamental Research Funds for the Central Universities of HUST [2018KFYXKJC051]
- Newton Advanced Fellowship Award of the Royal Society [NA160545]
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Memristor-based neural network circuits are considered as promising hardware implementations for artificial neural networks. In the training of memristor-based neural networks, it slows down the training speed that synaptic weights cannot be adjusted synchronously. Meanwhile, the relation between synaptic weight variation and the duration of control signals is unknown in neuron circuits, which is disadvantageous for the training. This paper proposes a neuron circuit connecting memristor-CMOS hybrid synaptic circuits whose memristance can be adjusted simply by the positive voltage. According to the structure of the neuron circuit, an inference is implemented to obtain the relation between the increment or decrement of synaptic weight and the lasting time of control signal. Then, based on the presented neuron circuit, this paper proposes a single layer neural network (SNN) achieving character recognition and a multi-layer neural network (MNN) for pattern classification. Under the control of a microcontroller, the two networks realize synchronous weight adjustment that all the synaptic circuits required to change can adjust memristance at the same time in an iteration. (C) 2019 Published by Elsevier B.V.
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