4.7 Article

On the Low-Complexity, Hardware-Friendly Tridiagonal Matrix Inversion for Correlated Massive MIMO Systems

Journal

IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY
Volume 68, Issue 7, Pages 6272-6285

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TVT.2019.2915171

Keywords

MassiveMIMO(M-MIMO); linear detection; matrix inversion approximation (MIA); VLSI design; FPGA

Funding

  1. National Natural Science Foundation of China [61871115, 61501116, 61701293, 61871262]
  2. Jiangsu Provincial NSF for Excellent Young Scholars [BK20180059]
  3. National Science and Technology Major Project [2018ZX03001009]
  4. Six Talent Peak Program of Jiangsu Province [2018-DZXX-001]
  5. Distinguished Perfection Professorship of Southeast University
  6. Fundamental Research Funds for the Central Universities
  7. Scientific Research Training Program of Southeast University

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In massive multiple-input and multiple-output (MMIMO) systems, one of the key challenges in the implementation is the large-scale matrix inversion operation, as widely used in channel estimation, equalization, detection, and decoding procedures. Traditionally, to handle this complexity issue, several low-complexity matrix inversion approximation methods have been proposed, including the classic Cholesky decomposition and the Neumann series expansion (NSE). However, the conventional approaches failed to exploit neither the special structure of channel matrices nor the critical issues in the hardware implementation, which results in poorer throughput performance and longer processing delay. In this paper, by targeting at the correlatedM-MIMO systems, we propose a modified NSE based on tridiagonal matrix inversion approximation (TMA) to accommodate the complexity as well as the performance issue in the conventional hardware implementation, and analyze the corresponding approximation errors. Meanwhile, we investigate the very-large-scale integration implementation for the proposed detection algorithm based on a Xilinx Virtex-7 XC7VX690T FPGA platform. It is shown that for correlated massive MIMO systems, it can achieve near minimum mean square error performance and 630 Mb/s throughput. Compared with other benchmark systems, the proposed pipelined TMA detector can get high throughput-to-hardware ratio. Finally, we also propose a fast iteration structure for further research.

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