Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 66, Issue 6, Pages 2551-2556Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2019.2908970
Keywords
Hardening solutions; second breakdown voltage; Si MOSFET; SiC MOSFET; single-event burnout (SEB)
Funding
- China Postdoctoral Science Foundation [2018M641134]
- Civil Aerospace Preresearch Plan of China [B0202]
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This paper presents the simulation-based comparison between silicon (Si) and silicon carbide (SiC) MOSFETs on the single-event burnout (SEB) performance for the first time. The safe operation areas (SOAs) regarding SEB are extracted and compared between the two structures when the heavy ions with a different linear energy transfer (LET) strike the sensitive areas of the devices. It is demonstrated that benefiting from the higher doped drift region, SiCMOSFET has a larger SEB threshold voltagethan Si MOSFET at low LET range. However, it is the other way around at high LET range, which is attributed to the thicker epitaxy of Si MOSFET. The introduction of buffer layer to enhance the SEB hardness is also discussed. Results indicate that a thicker buffer layer is required for SiC MOSFET to enlarge the SOA, resulting in a more serious degradation of the specific ON-resistance (R-ON,R- sp). Consequently, other hardening solutions need to be further explored to ensure the safe operation of SiC MOSFET in space applications.
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