Journal
NANOSCALE RESEARCH LETTERS
Volume 14, Issue -, Pages -Publisher
SPRINGEROPEN
DOI: 10.1186/s11671-019-2960-8
Keywords
GaN; FET; Nano-pillar; Patterned substrate
Funding
- Sichuan Science and Technology Program [2019YFH0006]
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A novel enhancement-mode vertical GaN field effect transistor (FET) with 2DEG for reducing the on-state resistance (R-ON) and substrate pattern (SP) for enhancing the breakdown voltage (BV) is proposed in this work. By deliberately designing the width and height of the SP, the high concentrated electric field (E-field) under p-GaN cap could be separated without dramatically impacting the R-ON, turning out an enhanced Baliga's Figure-Of-Merits (BFOM, BV2/R-ON). Verified by experimentally calibrated ATLAS simulation, the proposed device with a 700-nm-long and 4.6-m-width SP features six times higher BFOM in comparison to the FET without patterned substrate. Furthermore, the proposed pillar device and the SP inside just occupy a nano-scale area, enabling a high-density integration of such devices, which renders its high potential in future power applications.
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