Program/Erase Cycling Degradation Mechanism of HfO2-Based FeFET Memory Devices

The mechanism of memory window (MW) degradation of Hf0.5Zr0.5O2-based ferroelectric field-effect transistors (FeFETs) with program/erase (P/E) cycling is investigated. First, the P/E cycling properties of the FeFETs are characterized at different cycling voltages. Then, the midgap voltage method is proposed to address the underlying drivers for the threshold voltage shift and MW degradation by separating the effects of oxide-trapped charges and interface-trapped charges. The mechanism for different threshold voltage evolutions between programed and erased states during P/E cycling is revealed. Moreover, the amount of MW degradation is nearly equal to the difference of midgap voltage shift values between programed and erased states, and the interface trap generation contributes to the midgap voltage shift.