Journal
ISA TRANSACTIONS
Volume 91, Issue -, Pages 196-206Publisher
ELSEVIER SCIENCE INC
DOI: 10.1016/j.isatra.2019.01.034
Keywords
Fractional order PID controllers; Reduced fractional order models; Time delay; Frequency domain design; Bode's ideal loop transfer function
Categories
Funding
- Istanbul Technical University Research Support Program (ITU-BAP) [MDK-2018-41344]
Ask authors/readers for more resources
In this paper, a fractional order PID controller cascaded with a fractional filter is proposed for higher order processes. In this analytical design methodology, one or two reduced fractional orders plus time delay models are used to represent higher order system transfer functions. The controller parameters are determined so as to meet certain frequency domain specifications. A unity feedback reference model is employed where Bode's ideal loop transfer function plus time delay of the fractional order model is placed in the forward path. The addition of this time delay provides the exact determination of frequency domain specifications if the system either intrinsically owns a time delay or a time delay is injected by its reduced order model. The proposed methodology is compared with two other related methodologies and it has been observed that the proposed controller performs much better than the others. Moreover, some empirical formulas for time domain characteristics of the reference model are numerically derived in terms of certain frequency domain specifications and time delay of the fractional reduced order model. The accuracy of these formulas is tested by simulations. The iso-damping, noise attenuation and load disturbance suppression performances of the proposed controller are also considered and compared with those of other related controllers. (C) 2019 ISA. Published by Elsevier Ltd. All rights reserved.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available