4.6 Article

Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 66, Issue 2, Pages 1075-1081

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2018.2887348

Keywords

High-efficiency klystron; optimization; scaling method

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A semianalytical parametric scaling procedure (PSP) for klystron design has been developed. The PSP allows existing klystron designs to be scaled to different operating frequencies, beam power, and perveance, while maintaining the electron bunching and deceleration processes. For the fixed layout of a klystron RF circuit, the PSP provides parameters of the scaled klystron which are nearly optimal. The theoretical background and step by step derivation of the scaling principles are presented. The effectiveness of the PSP is shown through a generic five-cavity L-band klystron.

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