Journal
IEEE ELECTRON DEVICE LETTERS
Volume 40, Issue 2, Pages 200-203Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2018.2886364
Keywords
Memristor; crossbar array; Boolean logic; reconfigurable; in-memory computing
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Funding
- National Key Research and Development Plan of MOST of China [2016YFA0203800]
- National Natural Science Foundation of China [61674061, 61874164]
- National Defense Advanced Research Program [31513040304]
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In-memory computing based on memristive logic is considered as a prospective non von Neumann computing paradigm. In this letter, we systematically analyze the four-variable logic method and map it into the operation of two anti-serial complementary memristors in the crossbar array architecture. Arbitrary Boolean logic can be implemented within three cycles with the experimental evidence of reconfigurable NAND, NOR, and XOR logic using Pt/HfO2/TiN devices. Taking advantage of the functional flexibility, a parallel 1-bit full adder that can be realized in 8 cycles within a 4 x 3 array has been designed and verified in simulation.
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