4.8 Article

Hybrid Integration of Graphene Analog and Silicon Complementary Metal-Oxide-Semiconductor Digital Circuits

Journal

ACS Nano
Volume 10, Issue 7, Pages 7142-7146

Publisher

AMER CHEMICAL SOC
DOI: 10.1021/acsnano.6b03382

Keywords

graphene; transistor; CMOS; hybrid; integrated; circuit

Funding

  1. Center for Advanced Soft Electronics - Ministry of Science, ICT and Future Planning as Global Frontier Project [CASE-2011-0031638]

Ask authors/readers for more resources

We demonstrate a hybrid integration of a graphene-based analog circuit and a silicon-based digital circuit in order to exploit the strengths of both graphene and silicon devices. This mixed signal circuit integration was achieved using a three-dimensional (3-D) integration technique where a graphene FET multimode phase shifter is fabricated on top of a silicon complementary metal oxide semiconductor fieldeffect transistor (CMOS FET) ring oscillator. The process integration scheme presented here is compatible with the conventional silicon CMOS process, and thus the graphene circuit can successfully be integrated on current semiconductor technology platforms for various applications. This 3-D integration technique allows us to take advantage of graphene's excellent inherent properties and the maturity of current silicon CMOS technology for future electronics.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.8
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available