Impact of Fin Width Scaling on RF/Analog Performance of Junctionless Accumulation-Mode Bulk FinFET

In this article, the RF and analog performance of junctionless accumulation-mode bulk FinFETs is analyzed by employing the variation of fin width so that it can be used as a high-efficiency RF integrated circuit design. The RF/analog performance evaluation has been carried out using the ATLAS 3D device simulator in terms of evaluation of figure-of-merits metrics such as transconductance (g(m)), gate-to-source/drain capacitances (C-gg), cutoff frequency (f(T)), and maximum frequency of oscillation (f(max)). Apart from RF/analog performance investigation, the variation of ON-current to OFF-current ratio (I-ON/I-OFF) and transconductance generation factor (g(m)/I-ds) have also been carried out. From this study, it is observed that smaller fin width of the device improves its performance.