4.6 Article

823-mA/mm Drain Current Density and 945-MW/cm(2) Baliga's Figure-of-Merit Enhancement-Mode GaN MISFETs With a Novel PEALD-AlN/LPCVD-Si3N4 Dual-Gate Dielectric

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 39, Issue 12, Pages 1888-1891

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2018.2879543

Keywords

Enhancement-mode GaN MISFETs; self-terminating etching; LPCVD Si3N4; plasma-enhanced atomic layer deposition (PEALD) AlN

Funding

  1. National Key Micrometer/Nanometer Processing Laboratory
  2. Nanofabrication Facility of the Suzhou Institute of Nano-tech and Nano-bionics

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In this letter, we demonstrate a novel PEALD-AlN/LPCVD-Si3N4 dual-gate dielectric employed in enhancement-mode GaN MISFETs, where the gate recess is fabricated based on our proposed self-terminating gate recess etching technique using a GaN cap layer as recess mask. By using LPCVD-Si3N4 and PEALD-AlN dual-gate dielectric layer, the devices exhibit a high-quality gate dielectric and a good GaN channel interface, yielding a high gate swing up to 18 V and a high channel effective mobility of 137 cm(2)/V.s at such high gate bias. Thus, the fabricated devices feature a highmaximumdrain current density of 823mA/mm, a threshold voltage of 2.6 V, an on-resistance of 7.4 Omega . mm, and an ON/OFF current ratio of 10(8) with gate-drain distance of 2 mu m. Meanwhile, a high off-state breakdown voltage of 1290 V is achieved with 10-mu m gate-drain distance. The corresponding specific on-resistance is as low as 1.76 m Omega . cm(2), leading to a high Baliga's figure of merit of 945 MW/cm(2).

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