4.7 Article

Synchronization Error Estimation and Controller Design for Delayed Lur'e Systems With Parameter Mismatches

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNNLS.2012.2205941

Keywords

Delayed Lur'e systems; neural networks; parameter mismatches; synchronization

Funding

  1. National 973 Project [2012CB720500]
  2. Key Program of National Natural Science Foundation of China [U1162202]
  3. Fundamental Research Funds for the Central Universities
  4. Shanghai Leading Academic Discipline Project [B504]
  5. Australian Research Council Discovery Projects [DP1096780, DP0986376]
  6. Research Advancement Awards Scheme Program at Central Queensland University, Australia

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This paper investigates the problem of master-slave synchronization of two delayed Lur'e systems in the presence of parameter mismatches. First, by analyzing the corresponding synchronization error system, synchronization with an error level, which is referred to as quasi-synchronization, is established. Some delay-dependent quasi-synchronization criteria are derived. An estimation of the synchronization error bound is given, and an explicit expression of error levels is obtained. Second, sufficient conditions on the existence of feedback controllers under a predetermined error level are provided. The controller gains are obtained by solving a set of linear matrix inequalities. Finally, a delayed Chua's circuit is chosen to illustrate the effectiveness of the derived results.

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