3.9 Article

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology

Journal

IEICE TRANSACTIONS ON ELECTRONICS
Volume E98C, Issue 12, Pages 1171-1178

Publisher

IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
DOI: 10.1587/transele.E98.C.1171

Keywords

transient fault; single event upset; soft error; radiation hardening; circuit reliability

Funding

  1. National Nature Science Foundation of China [61274036, 61371025, 61474036, 61574052]
  2. Anhui Provincial Natural Science Foundation of China [1508085MF117]

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In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.

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