Journal
COGNITIVE COMPUTATION
Volume 7, Issue 1, Pages 56-63Publisher
SPRINGER
DOI: 10.1007/s12559-014-9282-z
Keywords
EEG; BSS; SOBI; FPGA; Co-simulation
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Blind source separation (BSS) is an effective and powerful tool for signal processing and artifact removal in electroencephalographic signals. For real-time applications such as brain-computer interfaces, cognitive neuroscience or clinical neuromonitoring, it is of prime importance that BSS is effectively performed in real time. In order to improve in terms of speed considering the optimal parallelism environment that hardware provides, we build a high-level hardware/software co-simulation based on MATLAB/Simulink for BSS application. To illustrate our approach, we implement the most critical parts of the second-order blind identification algorithm with a fixed-point algorithm on a commercial field-programmable gate array development kit. The results obtained show that co-simulation environment reduces the computation time from 1.9 s to 12.8 ns and thus has great potential for real-time applications.
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