Journal
SOLID-STATE ELECTRONICS
Volume 93, Issue -, Pages 43-48Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.sse.2013.12.009
Keywords
Spiral inductors; RFIC; 3D integrated circuits
Funding
- UK Engineering and Physical Science Council EPSRC [EP/F033311/1]
- Engineering and Physical Sciences Research Council [EP/D032210/1, EP/F033311/1] Funding Source: researchfish
- EPSRC [EP/D032210/1, EP/F033311/1] Funding Source: UKRI
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Passive devices and spiral inductors in particular suffer severely from losses in the silicon substrate underneath. This major component in limiting the quality factor of spiral inductors can be mitigated by using higher substrate resistivity or by locally increasing the resistivity below the inductor. These approaches have been modelled mostly ad hoc with phenomenological it models guiding the design. In this paper we use HFSS 3D finite element simulations to simulate the response of spiral inductors above high resistivity substrates of various resistivities achievable with Si. We relate these simulations to a simple one-port model of the Q-factor of spiral inductors to show in physical terms that the effective substrate thickness of around 30 mu m of the spiral inductor is equal to half the electric field penetration depth. The value of the penetration depth depends on the lay-out of the spiral inductor, but, critically, not on the substrate resistivity, and hence the one-port model maintains the proportionality between resistance parameter and substrate resistivity. (C) 2013 Elsevier Ltd. All rights reserved.
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