Journal
SENSORS
Volume 12, Issue 2, Pages 2162-2174Publisher
MDPI
DOI: 10.3390/s120202162
Keywords
Hall sensor; CMOS technology; dynamic offset cancellation; chopped technique
Funding
- Science and Technology Support Project, Jiangsu, China [BE2009143]
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Integrated CMOS Hall sensors have been widely used to measure magnetic fields. However, they are difficult to work with in a low magnetic field environment due to their low sensitivity and large offset. This paper describes a highly sensitive digital Hall sensor fabricated in 0.18 mu m high voltage CMOS technology for low field applications. The sensor consists of a switched cross-shaped Hall plate and a novel signal conditioner. It effectively eliminates offset and low frequency 1/f noise by applying a dynamic quadrature offset cancellation technique. The measured results show the optimal Hall plate achieves a high current related sensitivity of about 310 V/AT. The whole sensor has a remarkable ability to measure a minimum +/- 2 mT magnetic field and output a digital Hall signal in a wide temperature range from -40 degrees C to 120 degrees C.
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