4.4 Article

Estimation of step-by-step induced stress in a sequential process integration of nano-scale SOS MOSFETs with high-k gate dielectrics

Journal

SEMICONDUCTOR SCIENCE AND TECHNOLOGY
Volume 28, Issue 12, Pages -

Publisher

IOP PUBLISHING LTD
DOI: 10.1088/0268-1242/28/12/125011

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Funding

  1. Council for Scientific and Industrial Research (CSIR), Government of India
  2. Department of Science and Technology (DST), Government of India
  3. University Grant Commission (UGC)

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The current work proposes a novel technique to incorporate process-induced uni-axial stress for significant mobility boosting in high-performance metal-oxide-semiconductor field-effect-transistors. It has been shown that two existing standard techniques, namely, silicon-on-sapphire and high-k gate dielectrics can be combined to develop such technology. Sapphire has very high elastic constant and thermal expansion coefficient, thereby capable of inducing a significant amount of stress which is observed to be biaxial in nature. However, with the incorporation of different materials during process integration, such biaxial stress is gradually changed to uni-axial nature. The high-k gate dielectric plays the key role in converting the biaxial stress to uni-axial. Several high-k gate dielectrics have been studied and titanium oxide (TiO2) is observed to maximize the induced stress and also effective to convert it to uni-axial. A final average longitudinal channel stress of 0.73 GPa has been obtained.

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