4.7 Article

Memristor Bridge Synapses

Journal

PROCEEDINGS OF THE IEEE
Volume 100, Issue 6, Pages 2061-2070

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JPROC.2011.2166749

Keywords

Memristor bridge synapse; neural networks; non-volatile memory; synaptic weight; voltage divider

Funding

  1. U.S. Air Force [FA9550-10-1-0290]
  2. National Research Foundation of Korea (NRF) [2010-0006871]
  3. Korean government (MEST)
  4. National Research Foundation of Korea [과C6B1618, 2010-0006871] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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In this paper, we propose a memristor bridge circuit consisting of four identical memristors that is able to perform zero, negative, and positive synaptic weightings. Together with three additional transistors, the memristor bridge weighting circuit is able to perform synaptic operation for neural cells. It is compact as both weighting and weight programming are performed in a memristor bridge synapse. It is power efficient, since the operation is based on pulsed input signals. Its input terminals are utilized commonly for applying both weight programming and weight processing signals via time sharing. In this paper, features of the memristor bridge synapses are investigated using the TiO2 memristor model via simulations.

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