4.6 Article

Enhanced annealing, high Curie temperature, and low-voltage gating in (Ga,Mn)As:: A surface oxide control study

Journal

PHYSICAL REVIEW B
Volume 78, Issue 5, Pages -

Publisher

AMER PHYSICAL SOC
DOI: 10.1103/PhysRevB.78.054403

Keywords

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Funding

  1. EU [IST-015728]
  2. Czech Republic [FON/06/E001, FON/06/E002, AV0Z1010052, KAN400100652]
  3. Praemium Academiae of the Academy of Science of the Czech Republic

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Our x-ray photoemission, magnetization, and transport studies on surface-etched and annealed (Ga,Mn)As epilayers elucidate the key role of the surface oxide in controlling the outdiffusion of self-compensating interstitial Mn impurities. We achieved a dramatic reduction in annealing times necessary to optimize the epilayers after growth and synthesized (Ga,Mn)As films with the Curie temperature reaching 180 K. A p-n junction transistor is introduced, allowing for a large hole depletion in (Ga,Mn)As thin films at a few volts. The surface oxide etching procedure is applied to controllably reduce the thickness of the (Ga,Mn)As layer in the transistor and we observe a further strong enhancement of the field-effect on the channel resistance. The utility of our all-semiconductor ferromagnetic field-effect transistor in spintronic research is demonstrated on the measured large field effect on the anisotropic magnetoresistance.

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