Journal
ORGANIC ELECTRONICS
Volume 11, Issue 11, Pages 1729-1735Publisher
ELSEVIER
DOI: 10.1016/j.orgel.2010.07.021
Keywords
Pentacene; Grain boundaries; Organic thin film transistors; Hole accumulation
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We present a comprehensive Kelvin probe force microscopy study of grain boundaries in pentacene transistors with different film thicknesses in combination with current-voltage measurements and 3D electrostatics simulations. It is found that in pentacene films thinner than approximately 30 nm, holes are accumulated in the grain boundaries due to negative trapped charge at the SiO2-pentacene interface. On the other hand, in thicker films we observe hole depletion near the boundaries mainly due to positive charge trapping in the grain boundaries. The results are discussed in view of their effect on pentacene thin film transistors performance. (C) 2010 Elsevier B.V. All rights reserved.
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