Journal
NATURE MATERIALS
Volume 12, Issue 3, Pages 246-252Publisher
NATURE PUBLISHING GROUP
DOI: 10.1038/NMAT3518
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Funding
- National Research Foundation of Korea
- Korean Government [NRF-2011-351-C00034]
- UCLA cross-disciplinary scholars in science and technology (CSST) programme
- Camille and Henry Dreyfus Foundation through the Camille and Henry Dreyfus Postdoctoral Program in Environmental Chemistry
- NSF CAREER award [0956171]
- ONR Young Investigator Award [N00014-12-1-0745]
- NIH Director's New Innovator Award Program [1DP2OD007279]
- Direct For Mathematical & Physical Scien
- Division Of Materials Research [0956171] Funding Source: National Science Foundation
- National Research Foundation of Korea [357-2011-1-C00034] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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Graphene has attracted considerable interest for future electronics, but the absence of a bandgap limits its direct applicability in transistors and logic devices. Recently, other layered materials such as molybdenum disulphide (MoS2) have been investigated to address this challenge. Here, we report the vertical integration of multi-heterostructures of layered materials for the fabrication of a new generation of vertical field-effect transistors (VFETs) with a room temperature on-off ratio > 10(3) and a high current density of up to 5,000 A cm(-2). An n-channel VFET is created by sandwiching few-layer MoS2 as the semiconducting channel between a monolayer graphene sheet and a metal thin film. This approach offers a general strategy for the vertical integration of p- and n-channel transistors for high-performance logic applications. As an example, we demonstrate a complementary inverter with a larger-than-unity voltage gain by vertically stacking graphene, Bi2Sr2Co2O8 (p-channel). graphene, MoS2 (n-channel) and a metal thin film in sequence. The ability to simultaneously achieve a high on-off ratio, a high current density and a logic function in such vertically stacked multi-heterostructures can open up possibilities for three-dimensional integration in future electronics.
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